ATOM one is the smallest Full HD camera with Dual 3G-SDI output.
The camera is based on Sony’s IMX174 image sensor that provides exceptional image performance with multi matrix support.
ASIC, FPGA and SoC development
System on Chip (SoC), FPGA and embedded software designs for consumer electronics, telecommunications and automotive industries
ASIC, FPGA und SoC Entwicklung
Ihr deutsches Systemhaus für die Chip und FPGA Entwicklung im deutschspraching Raum. Embedded Software Entwicklung und Leiterkartenentwicklung auf höchstem Niveau.
Cutting-edge Image Processing for ADAS
Experience the future of driving with our state-of-the-art components for automotive safety!
Bildverarbeitung für Fahrerassistenzsysteme
Algorithmen und Komponenten für das autonome Fahren. Embedded Software Entwicklung nach ISO 26262. Autosar Entwicklung auf Infineon Aurix Bausteinen.
Arria 10 System on Module
The Arria 10 SOM is an Arria 10 SoC System on Module with an emphasis on embedded and automotive vision applications. Using Alteras Arria 10 SoC Devices in the 29x29 mm package, the module off ers a multitude of interfaces in a small 10 cm by 6 cm form factor.
The Arria 10 SoM was developed with an emphasis on embedded and automotive vision applications. Using Alteras Arria 10 SoC Devices in the 29x29 mm package, the module offers a multitude of interfaces in a small 8 cm by 6,5 cm form factor.
Altera Arria 10 SoC FPGA with 160 to 480 KLEs and Cortex A9 Dual Core CPU
- Power management on the module guarantees proper power-up and -down sequence, only 12V to be supplied by baseboard
- Two separate DDR4 memory interfaces
- CPU Memory System
- 32 Bit parallel Data Bus
- 8 Bit ECC supported for safety critical applications
- Up to 2.4Gbit/s per pin for a total bandwidth of 77Gbit/s
- FPGA Memory System
- 64 Bit parallel Data Bus
- Up to 2.4Gbit/s per pin for a total bandwidth of 153Gbit/s
- All 12 Transceivers at 12 GBit/s and above:
- Supports interfaces such as PCIe Gen3 x8, 10/40 GBit/s Ethernet, DisplayPort and 12G SDI
- Dedicated clocking on the module to provide lowest jitter for sensitive applications such as SD
- Up to 32 LVDS lanes to the baseboard:
- each either RX or TX
- support for soft clock recovery
- up to 1.6 Gbit/s per lane
- four dedicated clock inputs/outputs that allow configurations such as two LVDS TX x8 interfaces and another two LVDS RX x8 interfaces
- Two USB interfaces, one of them OTG (ULPI interface, separate PHY required on baseboard)
- Gigabit Ethernet
- ARM I²C, SPI & GPIO interface signals with levelshifters on the module (user provides desired reference voltage of 1.8-3.3V)
- UART, 6x, 6x 1V8 GPIO from the ARM and FPGA to the baseboard
- Up to 6x I²C interfaces
In order to accelerate customer development, the Intel Arria 10 Golden System Reference Design has been ported to the module. It includes the FPGA design with preconfigured IP for the HPS and memory controllers, as well as a customized Uboot and Angström Linux distribution. Dream Chip also offers software to configure the on-module programmable clock generator with the customers clocking requirements. Additional example designs will be available soon, such as 4K Displayport Input/output, 12 G SDI camera input and multiple camera surround view.
Get your latest updates at gitlab: https://gitlab.com/dreamchip/arria10som-uboot.git